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Unit information: VLSI Design 3 in 2020/21

Please note: you are viewing unit and programme information for a past academic year. Please see the current academic year for up to date information.

Unit name VLSI Design 3
Unit code EENG34050
Credit points 10
Level of study H/6
Teaching block(s) Teaching Block 2 (weeks 13 - 24)
Unit director Mr. Scott Tancock
Open unit status Not open
Pre-requisites

EENG20400

Co-requisites

None

School/department School of Electrical, Electronic and Mechanical Engineering
Faculty Faculty of Engineering

Description including Unit Aims

This unit introduces students to the principles of digital chip design.

Starting from a functional model of a MOSFET, analysis and design considerations for transistor level implementations of basic logic gates for different digital logic families are covered. These include static and dynamic logic styles for both combinational and sequential circuits.

Principles of synchronous system design are covered in detail, as are design techniques for dealing with signal integrity issues, and high performance and low power requirements.

The students will make extensive use of industry standard CAD tools for integrated circuit design, simulation and layout and gain experience in the design process from schematic entry to final tape-out of the chip.

Intended Learning Outcomes

Having completed this unit, students will be able to:• Analyse digital logic circuits for functionality, performance, energy and power consumption

  1. Analyse digital logic circuits for functionality, performance, energy and power consumption
  2. Design MOSFET circuits to implement a given digital logic function in complementary and pass-transistor design styles
  3. Design digital MOSFET circuits to meet performance constraints
  4. Construct the physical layout of small-scale circuits
  5. Describe synchronous design principles and apply them in system analysis
  6. Describe techniques for dealing with interconnect

Teaching Information

Teaching will be delivered through a combination of synchronous and asynchronous sessions, including lectures, practical activities supported by drop-in sessions, problem sheets and self-directed exercises.

Assessment Information

Formative: Coursework 1, 2 and 3 & Online Test

Summative: Exam (May/June) (100%)

Reading and References

Rabaey, Chandrakasan and Nikolic, Digital Integrated Circuits, 2nd ed, ISBN10: 0130909963

Weste and Harris, CMOS VLSI Design, 4th ed, ISBN10:0-321-54774-8

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